1. Field of the Invention
The present invention relates to semiconductor device that is provided with a Schottky electrode, and more particularly to a field-effect transistor having high breakdown resistance for application in high-frequency and high-temperature operation.
2. Description of the Related Art
As disclosed by, for example, Lei Wang et al. (Applied Physics Letters Vol.68 (No.9) pp.1267 (1996)), it is known that GaN semiconductors have a higher Schottky barrier than other Group III-V compound semiconductors.
According to the publication mentioned above, Wang et al. fabricated Pt/GaN and Pd/GaN Schottky diodes and measured the Schottky barrier heights of each. The Schottky barrier height of a Pt/GaN Schottky diode was 1.13-1.27 eV, and the Schottky barrier height of a Pd/GaN Schottky diode was 0.96-1.24 eV. These values are higher than the GaAs Schottky barrier height (0.7 eV or lower) or the InP Schottky barrier height (0.5 eV or lower).
In a heterojunction field-effect transistor (HJFET), an AlGaN layer is normally used as the semiconductor layer (electron barrier layer) that contacts a Schottky electrode. This is disclosed by, for example, Egawa et al. (Applied Physics Letters Vol.76 (No.1) pp.121 (2000)).
FIG. 1 is a sectional view of a field-effect transistor disclosed by Egawa, et al. As shown in FIG. 1, GaN seed formation layer 1002 having a film thickness of 30 nm, GaN layer 1003 having a film thickness of 2.5 xcexcm, AlGaN spacer layer 1004 having a film thickness of 10 nm, n-type AlGaN carrier supply layer 1005 having a film thickness of 20 nm, and n-type GaN cap layer 1006 having a film thickness of 20 nm are formed by metalorganic vapor phase epitaxy method on sapphire substrate 1001. A portion of GaN cap layer 1006 and AlGaN carrier supply layer 1005 is then removed by a reactive ion etching (RIE) method. Source electrode 1007 and drain electrode 1008 are then formed from Ti/Al, and gate electrode 1009 is formed from Pt/Ti/Au, thereby completing the field-effect transistor. Because the AlGaN layer has a larger band gap than a GaN layer, the Schottky barrier height at the interface of the Pt and AlGaN is higher than the Schottky barrier height at the interface of the Pt and GaN.
Nevertheless, Schottky barrier height is insufficient in the configuration of the prior-art during operation in which a Schottky voltage is applied in the positive direction. In particular, in the case of a field-effect transistor in which current across the source and drain is 0 when gate voltage is not applied, i.e., a field-effect transistor that operates in enhancement mode, there is the problem that the leakage current increases and the amplification factor deteriorates during operation, i.e., when a Schottky voltage is applied in the positive direction.
As a countermeasure, a method can be considered in which the thickness of the AlGaN layer is increased to raise the Schottky barrier thickness and decrease the leakage current. However, limitations exist in relation to the critical layer thickness, and increasing the thickness of the AlGaN layer sufficiently to obtain adequate Schottky barrier thickness is problematic. Increasing the Al composition in the AlGaN layer to raise the Schottky barrier height can also be considered. However, increasing the Al composition component brings about an increase in tensile strain within the layer and a decrease in the critical layer thickness, and obtaining sufficient Schottky barrier height is again problematic.
In view of the above-described problems, it is an object of the present invention to realize a Schottky barrier having sufficient height, which could not be obtained in the prior art, and thus effectively suppress leakage current.
To solve the above-described problems, the present invention prevents leakage current by forming an energy band structure having a Schottky barrier of two-step construction and having sufficient height by providing a layer having a compressive strain below a Schottky electrode, as shown, for example, in FIGS. 2A and 2B.
In a case in which III-V semiconductor layers having different lattice constants are formed, internal strain occurs in the semiconductor layers, and it is known that the piezoelectric effect that is brought about by this internal strain generates an internal field in the layers. For example, in a case in which, on the (0001) plane of a thick base layer that is composed of a III-nitride semiconductor, a material is formed that has a larger lattice constant than the thick base layer, compressive strain will remain in the layer if the film thickness of the formed material falls below the critical layer thickness at which dislocation generates due to lattice mismatch. The piezoelectric effect brought about by this compressive strain generates an internal field in the direction from the interior of the layer toward the surface. If the formed material has a smaller lattice constant than the thick base layer, on the other hand, tensile strain will remain in the layer and an internal field will be generated in the opposite direction. The present invention takes advantage of this piezoelectric effect to increase the Schottky barrier height. In this specification, the (0001) plane in the III-nitride semiconductor crystal refers to the plane that is shaded with diagonal lines in FIG. 3.
A semiconductor device of this invention comprises: a first electron barrier layer, a second electron barrier layer that is formed on this first electron barrier layer either directly or on an interposed spacer layer, and a Schottky electrode that is formed on this second electron barrier layer. A negative piezoelectric charge is induced on the first electron barrier layer side of the second electron barrier layer, and positive piezoelectric charge is induced on the Schottky electrode side of the second electron barrier layer.
According to this semiconductor device, the effect of the piezoelectric charge that is induced in the second electron barrier layer can effectively increase the Schottky barrier height of the first electron barrier layer, thereby enabling an effective suppression of leakage current.
In this semiconductor device, moreover, adopting a construction in which a negative piezoelectric charge is induced on the second electron barrier layer side of the first electron barrier layer and a positive piezoelectric charge is induced on the opposite side of the first electron barrier layer further increases the Schottky barrier height that is brought about by the piezoelectric charges that are induced in the second electron barrier layer.
If the first and second electron barrier layers are both formed from III-nitride semiconductor materials, good piezoelectric polarization can be produced and the Schottky barrier height is further increased by the piezoelectric charges that are induced in the second electron barrier layer.
Another example of the semiconductor device of this present invention comprises: a base layer, a first electron barrier layer that is formed directly on the base layer, a second electron barrier layer that is formed either directly on this first electron barrier layer or on an interposed spacer layer, and a Schottky electrode that is formed on this second electron barrier layer. The base layer, the first electron barrier layer, and the second electron barrier layer are all wurtzite III-nitride semiconductors that take the (0001) plane as the principal plane. In addition, the second electron barrier layer has compressive strain.
In this semiconductor device, the second electron barrier layer has compressive strain, and a piezoelectric charge can therefore be induced in the second electron barrier layer and the Schottky barrier height in the first electron barrier layer can be effectively raised, thereby effectively suppressing leakage current.
In this semiconductor device, moreover, if a structure is adopted in which the first electron barrier layer has tensile strain, the piezoelectric charge that is induced in the second electron barrier layer further increases the Schottky barrier height.
If the average of the lattice constant in the horizontal plane that is perpendicular to the direction of thickness is defined as the average lattice constant, making the average lattice constant of the second electron barrier layer greater than that of the base layer can produce compressive strain in the second electron barrier layer and thereby obtain a semiconductor device of the above-described structure. The average lattice constant is not the lattice constant for a multilayer film, but rather, the lattice constant that is specific to the material that constitutes the layer. For example, in a case in which an AlGaN layer having an a-axis lattice constant that is smaller than that of GaN is grown above a thick base layer that is composed of GaN in which the (0001) plane is the principal plane, tensile strain occurs in the AlGaN layer, and the lattice spacing of the GaN layer and AlGaN layer is equal in the horizontal plane that is perpendicular to the direction of layer thickness. Average lattice constant in this invention does not relate to lattice spacing when this type of strain is in effect, but rather, to such lattice constant that is inherent to the material. The lattice constant in the horizontal plane that is perpendicular to the direction of layer thickness coincides with the a-axis lattice constant if there is no inclination to the (0001) plane.
In this semiconductor device, making the average lattice constant of the first electron barrier layer smaller than that of the base layer increases the Schottky barrier height due to the piezoelectric charge that is induced in the second electron barrier layer.
A construction is preferably adopted in which the base layer is made up by Alxcex1Ga(1xe2x88x92xcex1)N; (0xe2x89xa6xcex1xe2x89xa61), the first electron barrier layer is composed of Alxcex2Ga(1xe2x88x92xcex2)N; (xcex1xe2x89xa6xcex2xe2x89xa61), and the second electron barrier layer is composed of InxGayAl(1xe2x88x92xxe2x88x92y)N; (0 less than xxe2x89xa61, 0xe2x89xa6y less than 1).
In addition, a construction is preferably adopted in which the base layer is composed of Alxcex1Ga(1xe2x88x92xcex1)N; (0 less than xcex1xe2x89xa61), the first electron barrier layer is composed of Alxcex2Ga(1xe2x88x92xcex2)N; (xcex1xe2x89xa6xcex2xe2x89xa61), and the second electron barrier layer is composed of Alxcex3Ga(1xe2x88x92xcex3)N; (0xe2x89xa6xcex3 less than xcex1).
In this way, the Schottky barrier height can be sufficiently increased and leakage current can be effectively suppressed.
The present invention is particularly effective when applied to a field-effect transistor, such as a High Electron Mobility Transistor (HEMT) or Metal Semiconductor Field-Effect Transistor (MESFET). In other words, if a construction is adopted in semiconductor devices of each of the above-described configurations in which the Schottky electrode is gate electrode and source and drain electrodes are further provided, the effect of the present invention is more pronounced, gate leakage current is further decreased, and field-effect transistors of superior reliability can be obtained.
In this case, the source electrode and drain electrode are preferably formed in contact with a III-nitride semiconductor layer having tensile strain or having no strain. Adopting this configuration simultaneously raises the Schottky barrier height in the gate electrode and enables a reduction in the contact resistance of the source electrode and drain electrode.
Another example of a semiconductor device of the present invention comprises a plurality of wurtzite III-nitride semiconductor layers of that take the (0001) plane as the principal plane, and a gate electrode, source electrode, and drain electrode that are formed over the semiconductor layers, The plurality of III-nitride semiconductor layers include a first layer composed of GaN and a second layer composed of AlxGa(1xe2x88x92x)N; (0 less than xxe2x89xa61). The gate electrode is formed so as to contact the first layer, and the source and drain electrodes are formed so as to contact the second layer.
In field-effect transistors of the prior art, gate electrodes are normally provided on AlGaN to increase the Schottky barrier height, and the source and drain electrodes are provided on doped GaN to reduce contact resistance. In the present invention, in contrast, the gate electrode is provided on GaN to increase the Schottky barrier height, and the source and drain electrodes are provided on AlGaN to increase the ohmic property of the electrodes. The Schottky barrier height of the gate electrodes can be increased because the surface of wurtzite GaN in which the (0001) plane is the principal plane has negative polarity. The Schottky barrier height can be increased because the GaN layer has a negative polarity in the vicinity of the interface on the gate electrode side. The effect of the negative polarity of the GaN surface and the effect of the above-described second electron barrier layer are each produced by different mechanisms, but the latter effect can obtain a more marked increase in the Schottky barrier height. A more effective configuration can be obtained if the GaN layer is caused to have compressive strain by adopting a method such as using AlGaN for the base layer.
The effects of the present invention are next described with reference to the accompanying drawings.
Wurtzite III-nitride semiconductors exhibit a piezoelectric effect in which potential is generated by the strain of crystals. For example, if AlGaN layer 1102 having a smaller lattice constant than a GaN layer is formed on GaN layer 1101 in which the (0001) plane is the principal plane, a positive charge is produced in the AlGaN on the side of heterojunction with GaN (on the side of the (000-1) plane of the AlGaN layer) and a negative charge is produced on the opposite side (on the (0001) plane side of the AlGaN layer), as shown in FIG. 4A. Conversely, if InGaN layer 1104 having a greater lattice constant than a GaN layer is formed on GaN layer 1103 in which the (0001) plane is the principal plane, a negative charge is produced in the InGaN layer on the side of the heterojunction with the GaN (the (000-1) plane side of the InGaN layer) and a positive charge is produced on the opposite side (the (0001) plane side of the InGaN layer), as shown in FIG. 4B.
In a Schottky electrode construction of the prior art, the Schottky barrier height is secured by adopting the above-described energy band structure of FIG. 4A. For example, in the HJFET (Heterojunction Field-Effect Transistor) shown in FIG. 1, AlGaN spacer layer 1004 and AlGaN carrier supply layer 1005 are provided on GaN layer 1003, and gate electrode 1009 is further formed over these layers to form an energy band structure as shown schematically in FIG. 4A.
In this configuration, however, there is a limit to the extent that the Schottky barrier height can be further increased. Although the Schottky barrier height can be increased if the AlGaN layer immediately underlying the gate electrode is made thick, there is a limit to the film thickness in relation to the critical layer thickness as described in the foregoing explanation, and there is constantly a limit to increasing the Schottky barrier height.
In the present invention, in contrast, an improvement in barrier height by means of the piezoelectric effect can be contrived by providing a semiconductor layer that has compressive strain directly beneath the electrode. This point is next explained with reference to FIGS. 5A-5D.
FIG. 5C shows an HJFET of the prior art, and FIG. 5A shows the corresponding band chart. Thick GaN base layer 92 is formed on substrate 90 with buffer layer 91 interposed, and AlGaN layer 93 and electrode 95 are formed on this GaN base layer 92. The crystal growth plane of each of the III-nitride semiconductor layers is the (0001) plane.
The HJFET construction according to the present invention, on the other hand, is shown in FIG. 5D, and the corresponding band chart is shown in 5B. This construction differs from the construction shown in FIGS. 5A and 5C in that InGaN layer 94 (the second electron barrier layer) is provided between AlGaN layer 93 (the first electron barrier layer) and electrode 95.
The Schottky barrier height can be effectively increased in the HJFET of the present invention because this InGaN layer 94 has compressive strain in the horizontal plane that is perpendicular to the direction of thickness. In this HJFET, the relationship of size of the crystal lattice constants of the semiconductor layer and thick GaN base layer 92 determines whether the internal strain of each semiconductor layer is compressive or tensile. Compressive strain in the surface occurs because the lattice constant (the a-axis lattice constant) in the horizontal plane that is perpendicular to the direction of thickness of InGaN layer 94 is greater than that of GaN base layer 92. As a result, a piezoelectric effect operates such that a positive charge is produced on the (0001) plane side and a negative charge is produced on the (000-1) plane side. The barrier height between a Schottky metal and III-nitride semiconductor is determined by the substances, and the conduction band energy of a III-nitride semiconductor that takes the Fermi level of the metal as a reference increases with distance from the interface of the metal and semiconductor. In other words, the barrier height for electrons increases with increasing distance from the interface between the metal and semiconductor. Thus, the leakage current at a Schottky interface can be reduced compared to the prior-art example (FIG. 5A), and a superior current amplification characteristic can be realized even when the gate bias is positively applied.
The above-described points are next explained in greater detail. The Schottky barrier height xcfx86B1 in the energy band structure of FIG. 5B is represented by the following equation:
xcfx86B1=(xcfx86InGaN+xcex94Ec+Vpiezo
xcfx86InGaN is the Schottky barrier height of InGaN.
xcex94Ec is the value of ((the energy of the lower end of the conduction band of AlGaN)xe2x80x94(the energy of the lower end of the conduction band of InGaN)).
Vpiezo is the potential difference caused by polarization occurring in InGaN layer 93 due to the piezoelectric effect.
In contrast, the Schottky barrier height xcfx86B2 in the energy band structure of FIG. 5A is represented by the following equation:
xcfx86B2=xcfx86AlGaN
xcfx86AlGaN is the height of the Schottky barrier of AlGaN.
The amount of increase of the Schottky barrier height due to the present invention can be found from xcfx86B1xe2x88x92xcfx86B2. Since (xcfx86InGaN+xcex94Ec) and xcfx86AlGaN are substantially equal, this amount of increase is substantially equal to Vpiezo. In other words, the present invention increases the Schottky barrier height by taking advantage of the piezoelectric polarization that is generated in a layer having compressive strain that is arranged directly beneath an electrode.
The first electron barrier layer of the present invention is provided for increasing the electron barrier of the second electron barrier layer. The second electron barrier layer is preferably formed over and in direct contact with the first electron barrier layer, but may also be formed on an interposed spacer layer having a thickness of, for example, 10 nm or less.
The base layer of the present invention is the thickest layer of the semiconductor layers that make up the semiconductor device, and is the layer that restricts the crystal systems of the other semiconductor layers. The strain modes of the other semiconductor layers are determined with this base layer as the standard. In other words, tensile strain is produced in layers having a lattice constant that is smaller than that of the base layer, and compressive strain is produced in layers having a lattice constant that is greater than that of the base layer.
When a semiconductor layer having a lattice constant that differs from that of the base layer is formed over the base layer, dislocation is generated and lattice relaxation occurs in the semiconductor layer if the semiconductor layer is thicker than a critical layer thickness. Thus, in order to generate sufficient piezoelectric polarization and make the effect of the present invention significant, the thickness of the semiconductor layer is preferably kept at or below the critical layer thickness. Nevertheless, lattice relaxation normally does not proceed to completion, and a fixed lattice strain remains even when the semiconductor layer is thicker than the critical layer thickness. As a result, a film thickness that exceeds the critical layer thickness can be adopted in the present invention if within the range in which a fixed piezoelectric effect can be obtained.
Although the first and second electron barrier layers are preferably less than the critical layer thickness as described hereinabove, there is no particular lower limit, and, for example, these layers may have a thickness that is only several times greater than the size of the atoms (on the order of 10 xc3x85).
The critical layer thickness can be calculated using Matthews"" Equation (J. W. Matthews and A. E. Blakeslee; Journal of Crystal Growth, 27 118 (1974)). FIGS. 6 and 7 show the calculation results. The parameters used in this calculation are shown in the following table.
As described in the foregoing explanation, the provision of a layer having compressive strain below the Schottky electrode both enables the formation of a Schottky barrier of two-step structure having sufficient height and enables the effective prevention of leakage current below the electrode.
The above and other objects, features, and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate examples of the present invention.